The invention relates to an amplifier arrangement comprising a first amplifier having a first transistor for producing on an output a first output voltage to a maximum first voltage value, which first amplifier is coupled between a first and a second supply voltage terminal.
Such an amplifier arrangement can be used for amplifying a signal in electronic circuits, such as integrated audio amplifier circuits.
An amplifier arrangement of this type is known inter alia from the second edition of the book "Analysis and Design of Analog Integrated Circuits" by P. Gray and R. Meyer. In FIG. 3.8a on page 175 this book shows a transistor having a control electrode and two main electrodes, an input signal being applied to the control electrode and the supply voltage terminals being coupled to the main electrodes. The output voltage is taken from one of the main electrodes, which is coupled to the associated supply-voltage terminal by means of a resistor. A drawback of such an amplifier arrangement is that in the case of integration the maximum output voltage of the transistor is dictated by the fabrication process. If this maximum voltage value is exceeded this will be disastrous to the amplifier. Therefore, the output voltage of the amplifier is limited to the maximum voltage value. Generally, the voltage difference between the two supply-voltage terminals is selected to be smaller than said maximum voltage value, so that the output voltage cannot cause damage to the amplifier. However, if the voltage difference is selected to be larger than the maximum voltage value, the fabrication process will impose limitations on the output voltage of the amplifier arrangement.